为VLIW处理器的特殊功能部件生成代码的新方法

A New Approach of Generating Codes for a VLIW Processor's Special Purpose Function Units

通用的高级程序设计语言的编译器,比如C的编译器,不会为VLIW处理器的特殊功能部件自动生成代码。通常通过汇编语言来使用这些特殊功能部件,但是这个方案有着它的不足。笔者提出了一种新的方法来解决这些问题。定义了一种可视化并行建模语言VRTL-P,使用它来描述不同操作间逻辑上的可并行性。笔者还实现了一个VRTL-P的在线分析器,它可以根据VLIW处理器的具体实现来判断一组操作是否可以拼装到一条VLIW的指令中。还进一步研究了从VRTL-P生成目标代码和仿真执行VRTL-P的方法。通过使用这些技术,可以为VLIW处理器的特殊功能部件生成高质量的代码,并且可以提高软件的生产率。

A general purpose programming language,like C,and its compiler can not automatically generate codes for a VLIW processor's special purpose function units.Traditional ways that use to write assembly code using these special purpose function units usually suffer from serious drawbacks.This paper proposes a novel approach to solve the above problems.It defines a visualized parallelism modeling language VRTL-P.VRTL-P can describe the logical parallelity of different operations in a visualized and easy-to-understand way.It also implements an online analyser for VRTL-P,which can tell if operations can be put into a single VLIW instruction according to its implementing resource limits.It further develops a method that generates code from VRTL-P program and a method for simulation.Using these tech-niques,it is able to generate high quality code for a VLIW processor's special purpose function units,and obtains an exciting acceleration in software productivity.