期刊文献+

检测设备对空白晶圆在130nm及之后技术的质量认证(英文)

Metrology and Inspection Technologies for Starting Wafer Substrates at the 130 nm Node and Beyond
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摘要 在微电子生产进入深亚微米和纳米技术之后,空白硅晶圆材料正在承担起前所未有的角色来协助解决生产工艺和产品成本等关键问题。根据国际半导体技术路线图穴ITRS雪对空白晶圆关键物理參数的要求,探讨有关检测设备在提供晶圆表面局部平整度,nanotopography和表面COP缺陷等质量參数认证时所应具备的技术和能力。 In the deep sub-micron and nanometer IC fabrication era, starting wafer materials are playing the roles as crucial as ever before in process technology choices and chip making cost reduction. This paper will discuss the related metrology tools and their capability requirements in starting materials quality certification for the critical physical characteristics to safeguard their responsibility in chip manufacturing. These physical parameters are wafer site flatness values, nanotopography, COP free surface, etc., according to the International Roadmap for Semiconductors.
作者 XIAYong
机构地区 ADECorporation
出处 《电子工业专用设备》 2004年第5期15-24,共10页 Equipment for Electronic Products Manufacturing
关键词 检测设备 硅片材料 表面局部平整度 表面COP缺陷 精密/公差 比率 Metrology Silicon wafers Site flatness Nanotopography COP free polished wafer P/T Ratio
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参考文献8

  • 1International Technology Roadmap for Semiconductors 2001Revision, Front End Processes.
  • 2International Technology Roadmap for Semiconductors 2003Revision, Front End Processes.
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  • 7Electrical Critieal Dimension Metrology for 100-nm Linewidths and Below, Andrew Grenville, et. al, SPIE, vol 4000, 2000.
  • 8Characterization and Modeling of Nanotopography Effects on CMP, D. Boning, et. al., International Symposium on CMP, 2000, Tokyo

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