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一种基于CMOS工艺库的DSP专用MAC设计 被引量：1

MAC Design Based on Standard CMOS Library for DSP System
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摘要 针对基于标准CMOS单元库的DSP系统专用MAC设计 ,本文提出了构建多模式算法最小并集的通用MAC平台思想以满足各种运算模式要求 ,并提出了划分MAC平台结构功能方法以实现与多流水DSP系统的最佳匹配 .在以 16位为基本乘法单元的MAC具体应用中 ,本文提出了Booth编码和部分积联合产生、舍入运算前置至Wallace树中处理和Wallace树型加法器比对选择等优化方法以求用最小的代价实现完善的功能 .电路综合实验表明采用本文所提出思想和方法可以有效减少MAC关键路径时延和电路门数 . Aimed at the MAC design in DSP system with standard CMOS library, this paper presents the idea of constructing the general MAC platform based on the minimal merging of multi-mode multiplications, which can well satisfy all kinds of DSP requirements and improve the efficiency of system. To achieve the perfect match with multi-pipeline DSP architecture, the idea of partition of the platform is also put up. As an example, a 16 bits DSP's MAC platform is illustrated. It applies the novel methods of Booth encoding combined with partial products generating, forwarding round disposal and selected realization of Wallace-tree adding to its optimization. Through the synthesis of MAC circuit, it validates that the ideas and methods well to reduce the critical path delay and circuit gates.
作者 陈继承 姚庆栋 刘鹏 史册
机构地区 浙江大学信息与电子工程学系
出处 《电子学报》 EI CAS CSCD 北大核心 2004年第8期1405-1408,共4页 Acta Electronica Sinica
基金 霍英东教育基金 (No .940 31 ) 浙江省重大科技项目 (No .0 2 1 1 0 1 559) 浙江省自然科学基金 (No .60 2 0 31 )
关键词 MAC DSP BOOTH编码 Wallac树 CMOS integrated circuits Digital arithmetic Electric network synthesis Optimization Signal encoding Trees (mathematics)
分类号 TN702 [电子电信—电路与系统]
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参考文献5

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同被引文献11

  • 1T Shikata, S Kondou, R Nose, Y Kuniyasu, M Naitoh, H Suzuki. A single-chip low power DSP/RISC CPU with 0.25μm CMOS technology [A]. IEEE Proceedings of Custom Integrated Circuits Conference [C]. 1998, 123-126.
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  • 6J Noel, V G Oklobdzija. New pipelined architecture for DSP [A]. Twenty-Ninth Asilomar Conference on Signals, Systems and Computers [C]. 1995, 1: 137-140.
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引证文献1

电子学报
2004年 第8期

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