摘要
对采样信号进行抽取是软件无线电中的一个重要环节 ,小抽取率时通常使用有限冲击响应 (FIR)滤波器。当FIR滤波器的阶数较高时 ,将会对信号处理的速度产生较大的影响。针对级联 积分 梳状 (CIC)滤波器系数少且全为“1”的特点 ,提出了在小抽取率时采用单级CIC滤波器和FIR滤波器级联的方式来减少FIR滤波器的阶数 ,从理论上给出了FIR滤波器减少的阶数和CIC滤波器的阶数之间的关系。在此基础上 ,借助多相滤波结构还可进一步降低FIR滤波器阶数。
Decimation from a sample signal is a very important step in software radio. FIR filter is commonly used for small decimation rate. But when the order of FIR is high, the signal processing speed would be reduced. Considering that the number of coefficients of CIC filter is small and the coefficients of it are all equal to '1', the method of a single CIC cascaded with FIR to reduce the order of FIR is proposed for small decimation rate. Some relations between the order of CIC and reduced FIR order have been derived theoretically. On this basis, utilizing poly phase filtering configuration, the order of filter can be further reduced. The simulation results verifies the method.
出处
《电子工程师》
2004年第7期44-46,共3页
Electronic Engineer