USB IP核在深亚微米设计平台中的设计与实现

Design of a Universal Serial Bus IP Core and Its VLSI Implementation

将USBIP核集成到一块MP3解码芯片上,其设计在0.18μm工艺平台中进行。它可作为一个成熟的IP核嵌入到其它ASIC芯片中。

The integration of USB IP core into an MP3 decoding chip is presented.The design was implemented on the platform of 0.18 μm standard cell library. As an IP core, it can be reused in some other ASIC chips.