摘要
基于3V、0.34μmCMOS工艺技术,设计了一种提高信号幅度的自举模拟开关,其线性区的导通电阻约为0.5Ω;输入信号通过该开关后,动态范围达到满幅度,并能将0～3V的时钟电压提升到0～6V。该开关适用于A/D转换器中的采样/保持电路和开关电容的滤波电路。
A bootstrapped analog switch, which can improve the signal range, is designed based on 3 V, 0.34 μm CMOS process. The on-resistance of the device is about 0.5 Ω in the linear region, and its signal input dynamic range is from rail to rail. With this switch, the clock voltage can be boosted from 0-3 V to 0-6 V. The device can find applications in sample-and-hold circuits for A/D converters and filter circuits based on switched-capacitors.
出处
《微电子学》
CAS
CSCD
北大核心
2004年第4期479-481,共3页
Microelectronics
