数字式频率相位差测量仪的设计

Design on the Digital Instrument of Frequency and Phase Difference

以单片机为控制核心,用可编程逻辑控制芯片CPLD,产生双32位的计数器和相位差检测器,进行等精度的频率、相位差测量.计数器的计数时间宽度和显示方式由键盘设定.单片机读入计数值,进行浮点运算,测量结果显示于液晶屏上.

This design takes the single chip microcomputer as the control nucleus. The double thirty-two bit counter and phase difference detecter have been made by using the complex programmable logic device(CPLD) for measuring the frequency and phase difference on equal accuracy. The width of count time and display style can be set respectively by keyboard .The results are displayed on character LCD(liquid crystal display) after the single chip microcomputer processed the data coming from CPLD by float arithmetic.