摘要
处理器存储系统的效率对其整体性能有着十分重要的作用。文中介绍了P4处理器内存的体系结构,它包括一级数据Cache、二级Cache、TraceCache;各部分完成的功能以及为提高命中率和降低存取时间,从而提高效率而采取的预取处理机制;P4处理器主要采取具有层次结构的内存设计、大容量的二级Cache和在跟踪Cache中采用预取处理机制的方法来提高Cache的命中率和降低未命中的代价来缩短处理器的访问时间,最终达到提高处理器整体性能的目的。
The efficiency of microprocessor memory is very important to its holistic capability.It introduces the architecture of Intel P4 Microprocessor memory, includes L1 data Cache, L2 Cache, Trace Cache; the function of these portions and the prefetch mechanism which can advance the efficiency by increasing the hit rate and reducing the memory access time. To reduce the access time which can increase the holistic capability of microprocessor, P4 microprocessor adopts these ways: hiberarchy-design, bulky L2 Cache and applying prefetcher which can increase the hit rate of cache and reduce the cost of hit failed.
出处
《微机发展》
2004年第7期47-48,51,共3页
Microcomputer Development