摘要
介绍一种基于 10 b的 A/ D变换器芯片的数据采集系统的设计 ,测试结果表明该数据采集系统采样率可达2 0 0 MS/ s,有效位数达到 8.
The design of a data acquisition system based on 10 b ADC is introduced in this paper.The test result indicates that the sampling frequency of the data acquisition system reaches 200 MS/s and the ENOB of it reaches 8.19 b.
出处
《现代电子技术》
2004年第15期48-49,53,共3页
Modern Electronics Technique
