实验仪上高速缓存的设计方法及实现

The Method of Designing a Cache on the Experimental Facility for Principles of Computer Organization

高速缓存(Cache)是计算机组成原理教学中的一个重要部分,由于技术上的原因,目前市场上的组成原理实验仪都不包含Cache。对在实验仪上设计开发Cache提出了一种新的方法,并针对流行的TDN-CM+型组成原理实验仪的结构,用CPLD器件仿真实现了Cache部件,典型数据定量仿真测试表明,所设计的Cache部件具有合理的命中率,符合计算机上Cache的工作原理又能够满足教学需要。

Although cache is one important part of teaching and learning in university, it does not been included in all experimental facilities on the market because of designing technology. The article introduces a method of designing a cache unit on the experimental facility for principles of computer organization. Using this method, we can construct a cache unit for much experimental facility, the example of designing a cache unit on TDN-CM+ experimental facility has been cited to illustrate the method,the performance analysis indicates that the cache unit has high efficiency.