基于BIST的FPGA逻辑单元测试方法

An approach for testing FPGA logic cells based on BIST

给出了一种基于内建自测(BIST)的测试现场可编程门阵列(FPGA)逻辑单元的方法,讨论了测试的配置结构、故障覆盖率和测试中出现的问题及解决办法.实验表明,该测试方法具有所需测试向量少、故障覆盖率高、简便适用等优点.

An approach for FPGA(Field Programmable Gate Array) testing logic cells based on BIST(Built-In Self-Test) is presented. Some problems and corresponding solvent during testing, such as configurable structure and fault diagnose scale are discussed. Simulation results show that the testing approach have a lot of advantages, such as fewer test vectors, higher fault diagnose scale, a simple method of application, etc.