VHDL和MAX+PLUS在设计数字电路中的应用

Design and Simulation of Digital Circuit by Using VHDL and MAX+PLUSⅡ

以 VH DL为开发工具 ,以 MAX+ PL U S 为开发环境 ,以几个典型芯片为例 ,采用符合国际工业标准的 V HDL语言的行为级描述方法 ,以自上而下的方式重新设计了芯片。

Taking advantage of the development tool of VHDL and the development environment of MAX+PLUSⅡ,taking several characteristic chips for example,this paper use behavioural description of VHDL adapting to international industry standard,and redesign the chips by topdown methodology.