基于FPGA的逻辑分析仪多路量化显示电路的实现

Realization of Multi-channel Display Circuit of Digital Logic Analyzer based on FPGA

介绍了数字逻辑分析仪工作原理 ,分析了硬件电路的各部分组成及功能。讨论了在普通示波器上实现多路数字逻辑信号量化显示电路设计的方案。在研究 F PGA设计电路方法和特点的基础之上 ,给出了硬件实现的 VHDL 程序 ,并进行了时序仿真 ,表明了 FPGA技术在电路设计方面比传统方法有较强的优势。

This paper introduces the principle of a Digital Logic Analyzer,and analyzes the composition and function of its hardware circuit. The design scheme of the multi-channel display circuit for the logic analyzer is discussed. According to the research on FPGA design method and characteristics,it gives VHDL programming and simulated time-sequence of designed circuits. It shows that FPGA technology has more advantages compared with traditional circuit design.