超高速BCH码解码改进算法研究

Modified decode algorithm of BCH code for ultrahigh-speed system

为了满足高速光纤通信系统纠错编码(FEC)的要求,本文提出了一种简单的BCH码解码算法,省略了复杂的矩阵运算,除法运算,也避免了难以理解的迭代运算。其编译码速度快、效率高,并针对硬件特点做了一些优化,特别适合于硬件实现。同时,本文提出了并行算法,大大加快了编译码速度。利用可编程器件FPGA实现,仿真结果完全正确,且非常有效。该算法不仅可用于高速光纤通信系统中,也可以用于其他高速通信系统。

In order to content with forward error correction (FEC) technology of the high-speed optical communication system, a new simple high-speed decoding algorithm for BCH codes is proposed, which is high efficiency and speed, without matrix-operation or division-operation or intricate iterative algorithm. It is easy to implement with hardware. At the same time, the parallel algorithm is proposed, which increases the speed of decoding greatly. The result of FPGA emulation confirms that the algorithm is feasible completely and high efficient. The algorithm can be used in the high-speed optical communication system and other high-speed communication system field.