摘要
基于理论和实验结果对深亚微米硅集成电路中的共面传输线的特性进行了研究 ,提出了硅衬底上传输线分布参数的提取方法和减小共面线衰减的一些设计准则 .成功地将共面线应用在深亚微米高速集成电路的设计中 ,并给出了放大器芯片和共面线的测试结果 .测试结果表明 :在深亚微米 CMOS高速集成电路中 ,用共面线实现电感是一种行之有效的方法 .
The characteristic of coplanar stripline in deep-submicron CMOS integrated circ uits is studied based on theoretictal analysis and measured results.Distributed parameter extraction methods for transmission lines on silicon substrate are pro posed and design guidelines to minimize the loss of coplanar striplines are also given.Finally,the coplanar stripline on-chip is successfully used in the desig n of the high-speed IC's,and some measured results are also given.The measured results indicate that inductance can be implemented using coplanar striplines in deep-submicron CMOS high-speed IC's.
基金
美国 Octillion通信公司资助项目~~
关键词
共面线
深亚微米CMOS集成电路
高速限幅放大器
coplanar stripline
deep-submic ron CMOS integrated circuits
high-speed limiting amplifier