一种数字化DS/BPSK接收机的设计方案

Design Scheme of a Digital DS/BPSK Receiver

介绍一种新型DS/BPSK(DirectSpread/BinaryPhaseShiftKey)接收机的设计方案。该接收机以DSP为核心,应用FPGA电路实现模块化设计,技术上采用基于快速傅里叶变换(FFT)的并行伪码快速捕获方式,AFC频率跟踪,科斯特环载波相位跟踪及延迟锁定环码跟踪等方式,可通过软件算法灵活实现。该接收机具有实时性强,及软件接口灵活的特点,可有效地应用于低信噪比的基于码分多士的测控系统中。

The design scheme of a new digital DS/BPSK receiver is introduced. It used a field programmable gate array(FPGA)circuit combined with digital signal processor(DPS) .It applies parallel PN code acquisition FFT-based, AFC frequency-locked tracking loop, Costas phase-locked tracking loop and delay-lock tracking loop techniques. All techniques are implemented by means of algorithm in DSP. The receiver is characterized by real time performance as well as flexible hardware and software interface. It can be efficiently used in multi-object telemetry and control system based on code division multiple accesses with low signal-to-noise ratios (SNRs).