摘要
介绍了可以简化逻辑电路设计的可编程逻辑器件EPLD,详述了它的工作原理、开发工具,并且举例说明了应用EPLD 设计电路的具体过程。
This paper introduces an Erasable Programmable Logic Device(EPLD)that can simplify the logic circuit design,presents its principle and the developing utensils,and further examplifies the complete procedure of logic-circuit designing with theapplication of EPLD.
出处
《哈尔滨工业大学学报》
EI
CAS
CSCD
北大核心
1993年第6期55-60,共6页
Journal of Harbin Institute of Technology