期刊文献+

时态逻辑形式化描述并发系统性质 被引量:12

Formal description of properties of concurrency system by temporal logic
下载PDF
导出
摘要 时态逻辑是一种描述反应式(并发)系统中状态迁移序列的形式化方法,用于刻画并发系统所需验证的性质,是模型检测的基础.阐述了时态逻辑CTL 及其子逻辑CTL、LTL的语法及语义,然后分析运用时态逻辑描述并发系统性质,最后给出一个应用实例. The temporal logic is a formal method for describing sequences of transition between states in a reactive (concurrent) system. It is common to use the temporal logic to specify the properties that the design must satisfy. The temporal logic is the basic of model checking. This paper states the syntax and semantics of CTL~* and its sub-logics: CTL and LTL, and analyzes how to state the properties of concurrent system, and finally the application example is given.
出处 《海军工程大学学报》 CAS 2004年第5期10-13,共4页 Journal of Naval University of Engineering
基金 国家自然科学基金资助项目(60273092) 江西省自然科学基金资助项目(0411041) 南昌大学2003年度科研基金资助项目
关键词 形式化方法 并发系统 时态逻辑 模型检测 formal method concurrent system temporal logic model checking
  • 相关文献

参考文献6

  • 1[1]Peled D. Software Reliability Methods [M]. Berlin: Springer-Verlag, 2001.
  • 2[2]Clarke E M, Grumberg O, Peled D A. Model Checking [M]. Cambridge, MA: MIT Press, 1999.
  • 3[3]Emerson E A, Halpen J Y. "Sometimes" and "Not Never" revisited: on branching versus linear time temporal logic [J]. Journal of the ACM, 1986,9(1) :12-17.
  • 4[4]Emerson E A, Clarke E M. Characterizing Correctness Properties of Parallel Programs Using Fixpoints [M]. Berlin: Springer-Verlag, 1980.
  • 5[5]Pnueli A. A temporal logic of concurrent programs [A]. 18th IEEE Symposium on Foundation of Computer Science [C]. Providence, Rhde Island: IEEE Computer Society Press, 1977.
  • 6[6]Berard B, Bidoit M, Finkel A. System and Software Verification: Model Checking Techniques and Tools [M].Berlin: Springer-Verlag, 2001.

同被引文献72

引证文献12

二级引证文献17

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部