闭环集成光陀螺中FIR滤波器的设计和应用

The Design and Implement of FIR Filter in IFOG

为提高闭环集成光陀螺中电路的性能,提出了采用现场可编程门阵列器件(FPGA)实现有限冲激响应(FIR)数字滤波器的方案,并给出了一个8阶低通FIR数字滤波器的FPGA流程、算法的设计及其实现。仿真和测试结果表明,所设计的滤波器电路工作正确可靠,满足设计要求。

For improvement the feature of the circuit in closed-loop integrated fiber optic gyro, a solution in which field programmable gate array (FPGA) was applied to realize finite impulse response (FIR) filter was put forward in this paper. The design of the flowchart and algorithm and its realization for FPGA in a 8-order FIR filter were also presented. The results of simulation and test showed that the circuit in FIR filter designed was in well work condition, which met the requirement for design.