摘要
针对复杂的电机驱动控制系统对集成化和速度等级的要求,基于EDA技术,利用Altera公司的QuartusII软件及EP1K50QC208-3芯片,并采用分时复用的思想和VerilogHDL硬件描述语言设计了基于FPGA的三相SPWM变频控制器的IP核,给出了存储单元和占空比计算单元的设计方法,并进行了仿真与实验分析.存储单元和占空比计算单元的设计中,实验结果表明,该设计完全可以满足电机驱动和变频电源的实时控制要求,且开关频率、死区时间等参数可在线修改,具有开发周期短,可靠性高等特点.
Aiming at the demand in integration and speed level of complicated motor driving control system, in this research, an FPGA -based 3 -phase sinusoidal PWM WVF controller IP core is designed by using EDA technique. The design takes full advantage of QuartusII software of Altera Company. And the hardware circuit is realized in the EP1K50QC208-3 chip. VerilogHDL is used to describe the logical circuit designed in the research. Meanwhile, simulation and experimental analysis has been done. To save the chip resource, a thought of time -sharing is applied in the design of memory unit and duty ration calculating unit. The result of the experiment shows that this design can fully meet the demand of electrical machine driving and variable - frequency power sources.
出处
《哈尔滨理工大学学报》
CAS
2004年第5期25-28,共4页
Journal of Harbin University of Science and Technology