200Ms/s 177mW 8bit Folding and Interpolating CMOS A/D Converter

200Ms/s177mW8位折叠内插结构的CMOS模数转换器(英文)

A CMOS folding and interpolating analog-to-digital converter (ADC) for embedded application is described.The circuit is fully compatible with standard digital CMOS technology.A modified folding block implemented without resistor contributes to a small chip area.At the input stage,offset averaging reduces the input capacitance and the distributed track-and-hold circuits are proposed to improve signal-to-noise-plus-distortion ratio.The 200Ms/s 8bit ADC with 177mW total power consumption at 3.3V power supply is realized in standard digital 0.18μm 3.3V CMOS technology.

介绍了一个采用折叠内插结构的 CMOS模数转换器 ,适合于嵌入式应用 .该电路与标准的数字工艺完全兼容 ,经过改进的无需电阻就能实现的折叠模块有助于减小芯片面积 .在输入级 ,失调平均技术降低了输入电容 ,而分布式采样保持电路的运用则提高了信号与噪声的失真比 .该 2 0 0 MHz采样频率 8位折叠内插结构的 CMOS模数转换器在 3.3V电源电压下 ,总功耗为 177m W,用 0 .18μm3.