7.3GHz 0.18μm CMOS注入式锁相环电路

7.3GHz 0.18μm CMOS Injection Phase-Locked Loop

给出一种利用 0 .18μm CMOS工艺实现的注入式振荡器辅助锁相环 .在 1.8V电源电压下 ,电路工作频率为7.3GHz,功耗为 15 7m W,跟踪范围为 15 0 MHz,锁定时在 1‰ (7.3MHz)频率偏移量下的相位噪声为 - 97.36 d

A high-speed phase-locked loop (PLL) which is realized in a standa rd 0.18μm CMOS technology is introduced.This circuit employs an injection ring -VCO with an auxiliary PLL.The circuit has 7.3GHz of central frequency with 15 7mW of power dissipation under a 1.8V supply.An experimental prototype exhibits 150MHz of tracking range.The phase noise in the locked condition is -97.36dBc /Hz at 1‰ offset(7.3MHz).