一种用FNT变换完成大点数循环卷积IP核的VLSI实现

A Parameterized FPGA Realization of High-speed FNT Processor

由于FNT变换本身的局限,不能完成大点数循环卷积。文章提出一种运用FNT变换实现循环卷积的方案。不仅具有FNT本身零误差的优点,而且有适合于硬件实现,具有不用保存中间结果,节省面积的优点。

Because of FNT's inherent restrictions, it is hard to implement cyclic convolution using FNT. This paper presents a solution for the implementation of cyclic convolution using FNT. Its advantages include not only zero-error brought by FNT, but also convenience for hardware manipulation, no saving for intermediate data and less area-consume.