摘要
本文分析多级组合逻辑结构中各数据信号取值状态及其与之相关的信号取值状态,构造数据信号取值状态与或图。利用与或图修剪技术寻求相应逻辑结构中冗余逻辑连线。消除多级逻辑结构中冗余的逻辑连线、冗余逻辑门并进行相应的等价逻辑结构变换,实现多级逻辑优化。该优化过程直接在多级逻辑结构上进行并保持了原逻辑结构的总体结构特征,运行时空复杂性对基本输入/输出数目依赖很少,能适应大规模数字逻辑结构优化。
This Paper analyzes the data signal's state of value and its corresponding signals' state of value. An and-or-graph is created to represent the states of value and their relation. Redundant lines in the logic structure are found by pruning-the and-or-graph. Multilevel optimization is implemented by a series of logic structural transformations which delete the redundant lines and gates to improve some local structures. The optimization process directly deal with the multilevel logic structure and keeps the formal logic structure.The computing/space complexity of the algorithm is trivial corresponding to the number of primary inputs/outputs, which is applicable to optimization of large scale integrated circuits.
出处
《计算机辅助设计与图形学学报》
EI
CSCD
1993年第4期275-283,共9页
Journal of Computer-Aided Design & Computer Graphics
关键词
逻辑优化
结构
逻辑设计
Logic optimization, combinational circuit, structural optimization.