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MB86901 SPARC RISC芯片全机行为功能级模拟策略的研究 被引量:1

A STRATEGY FOR WHOLE MACHINE BEHAVIORAL FUNCTIONAL LEVEL SIMULATION OF MB86901 SPARC RISC CHIP
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摘要 本文提出了一种基于指令系统的MB86901 SPARC RISC芯片的行为功能级测试方法。和[2]中的方法相比,由于DCL语言自身的特点,本文给出的方法有着简洁且故障覆益率高的特色。文章扼要地介绍了MB86901的指令系统,然后按照先测试寄存器,再逐条测试单个指令,最后测试指令间关系的逻辑顺序逐步对MB86901进行测试。对于寄存器的测试,我们采用了“雨点法”,使得寄存器故障覆盖率接近100%,在最常用的算术/逻辑/移位指令的测试中,我们使用了一个随机数发生器,使故障覆盖率大为提高。而且它的使用非常灵活。最后,我们测试了指令间可能出现的关系。 This paper describes an approach to instruction system-based on behavioral functional level test of MB86901 SPARC RISC chip. The test steps are given as follow: fust, the special purpose registers and register files are tested; second, the individual instructions, and finally the possible relationship between instructions are also tested. The Reed Muller codes are used to test registers. A random number generator is presented while testing the A/L/S instructions.
出处 《计算机辅助设计与图形学学报》 EI CSCD 1993年第4期284-291,共8页 Journal of Computer-Aided Design & Computer Graphics
关键词 微处理器 芯片 功能级 模拟 MB86901 SPARC RISC, behavioral functional level, Reed Muller code,random number generator.
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  • 1.[EB/OL].http: //www. estec. esa. nl/wsmwww/presentation/SCoC.pdf.,.
  • 2Tiggeler Hans etc. Reeonfigurable Single-Chip On-Board Computer For a small Satellite. www. iafastro.com/arehives/pap2001/iaf-abstraet/IAFU/U-3- 09. htm.
  • 3Designing and Testing a Radiation Hardened 8051-like Micro-controller. http: //tima.imag.fr/Publieations/files/rr/drh-102. pdf.
  • 4Gaisler Jiri. A portable fault-tolerant microprocessor based on the SPARC V8 architecture, http: //www. cs.ucr. edu/-vahid/courses/269-s01/dasia99-leon.pdf.
  • 5Gaisler Jiri. LEON - 1 2.4.0 User Manual. http: //www. gaisler.com.
  • 6Haque Faisal. The Art Of Verification With Vera. Verification Central Fremont, California 2001.
  • 7Re-Thinking Your Verification Strategies for Multimillion Gate FPGAs. Xilinx. http: //www. xilinx.com.
  • 8Geist Daniel. A Methodology For the Verification of a "System on Chip". http: //www. wisdom, weizmann. ac. il/mathusers/tamarah/33-1.pdf.
  • 9Habinc S etc. Accelerated Verification of Digital Devices Using VHDL. VHDL Users' Forum in Europe,Switzerland, September 1998.
  • 10吴也文.32位RISC SparcCPU的功能测试方法[A]..电子测量与仪器学会第五届年会论文集[C].,1994..

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