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8bit CMOS高速电流型数模转换器设计 被引量:1

Design of A 8bit CMOS Current-Steering DAC
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摘要 系统分析了高速电流型CMOS数模转换器的设计方法。设计了一种采样率为100ms/s,分辨率为8bit,电源电压为3.3v的CMOS电流型DAC。采用同步锁存技术增加了转换速度。电路仿真结果表明在采样率为100Ms/s,输入信号从直流到Nyquist频率,无杂散动态范围(SFDR)为59dB。积分线性误差(INL)和微分线性误差(DNL)分别为±0.5LSB和±0.3LSB。在采样率为100Ms/s,电源电压为3.3v时的功耗小于300mw。电路采用0.35um标准CMOS工艺实现。 System analysis the design methodology of high speed current-steering cmos dac。A 3。3v 8bit 100Ms/scurrent-steering dac is presented。The proposed synchronized latch technique increase the conversion speed of dac。Simulation results show that the spurious-free-dynamic-range is better than 54dB for sampling frequency up to 100MSamples/s and signals from dc to nyquist frequency。Monte-Carlo simulations show that the integral non-linearity(INL) and differentialnon-linearity(DNL) is better than ±0。5LSB and ±0。3LSB respectively。The dac dissipated less than 300mW from 3.3vpower supply at 100ms/s sampling rate。The circuit has been designed in a standard 0.35um cmos process.
作者 茹纪军
出处 《电子质量》 2004年第10期54-55,60,共3页 Electronics Quality
关键词 数模转换器 电流型 CMOS 采样率 SFDR 杂散 锁存 高速 输入信号 同步 High speed Digital-to-analog converter Current-steering CMOS
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  • 1Hassanzadeh,M。R。,Talebzadeh,J。,Shoaei,o.a high-speed,current-steering digital-to-analog converter in0。6um cmos[].Electronic circuit andsystemsth internationalconference on.2002
  • 2Albiol,M。,Gonzalez,J。L。,Alarcon,E.Improved current sourcesizing for high-speed high-accuracycurrent-steering d/a converter[].Circuitand systems。ISCAS’’.2003
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  • 4Jose Bastos,Augusto M Marques,Michel S. J. Steyaert."A 12-Bit Intrinsic Accuracy High-Speed CMOS DAC"[].IEEE Journal of Solid State Circuits.1997
  • 5KOSUNEN M,VANKKA J,TEIKARI I,et al.DNLand INL yield models for a current-steering D/A con-verter[].Proc IEEE Int Symp Circ Syst.2003

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