FIR滤波器FPGA实现

The Realization of FIR Filter Based on FPGA

针对高速数字信号处理的要求,给出用现场可编程门阵列(FPGA)实现有限冲击响应(FIR)滤波器的方案。讨论使用FPGA实现固定系数FIR滤波器的三种方法,即查表法、分布式运算法和典型带符号数(CSD码)法,并比较其优缺点,最后使用CSD码方法设计实现一个FIR低通滤波器。

In this paper,a solution about FIR filter to fit the high speed DSP is proposed,which is the FIR filter based on FP- GA devices.Three methods are discussed for implement FIR filter with fixing coefficients using FPGA.They are lookup table method,distributing arithmetic method and CSD codes method.We compare the three method and conclude the advantages and dis- advantages of them.Finally,we finish a FIR lowpass filter using CSD codes method.