摘要
从全面满足先进防空防天武器系统中弹上信息处理系统总体性能出发,结合高速集成电路的发展,针对传统分布式弹上信息处理系统体系结构存在的不足,提出一种基于HPI互连结构的紧耦合双CPU弹上信息处理系统设计方案,并通过对双CPU间互连结构———HPI接口性能的分析,对该方案的可行性进行了初步论证,为解决弹上实时控制计算任务处理中大量通信开销的问题提出一种解决方案。
In order to satisfy the missile advanced performance in modern war,a new design of airborne information processing system(IPS)—tightly coupled dual CPU system based on HPI interconnecting structure by comparing with traditional ISP of distributed multiple CPUs is provided. The feasibility of the dual CPU structure by analyzing the communication timing consumption and data transfering speed of HPI interface between this two CPUs is demonstrated. The proposed method is effective to deal with the bottleneck of critical real-time airborne control computation.
出处
《系统工程与电子技术》
EI
CSCD
北大核心
2004年第11期1616-1619,共4页
Systems Engineering and Electronics
关键词
弹上信息处理系统
紧耦合
双CPU
总线互连
HPI接口
airborne information processing system
tightly coupling
dual CPU
bus connection
HPI interface