基于FPGA的H.263编码器设计

Design of H.263 Encoder Based on FPGA

由于需要传输和处理的数据量巨大,采用可编程逻辑器件,可充分发挥FPGA高速、实时的特点,为视频图像压缩处理提供一个解决途径,同时也为进一步设计视频处理ASIC打下基础。经仿真结果表明,采用Altera公司的FPGA器件FLEX10K20(两片)和APEXⅡ(一片),可完成4:2:0的CIF(Common Image Format)图像信号实时压缩处理。该编码器设计中,采用了多级流水线和并行处理的结构,使整个系统的速度得到了很大的提升,同时在后仿真阶段作了仔细的优化,在保证速度的条件下,使整个系统占用的硬件资源最少,具有很好的实用价值。

A FPGA (Field Programmable Gate Array)-based structure hardware platform that implements an H.263 encoder is presented.The original image is CIF (Common Image Format), in which the data in the intra-frame and between two frames are very large. In order to transfer and process such a huge amount of data, programmable logic devices that can ensure the high speed and real-time of FPGA are used. Therefore, it proves another way to achieve the image compression arithmetic which takes full advantage of the hardware resource.