摘要
提出了一种基于SAT问题的组合电路等价验证算法,该算法特别适用于验证有着一定相似部分的两个电路。其主要创新之处为:1)基于层划分的配对点生成方法;2)基于阈值控制的回溯过程。ISCAS'85的实例很好地证明了该算法的有效性。
An improved SAT-based framework for combinational equivalence checking (CEC) is presented, which is specifically targeted on building a robust checker to compare large circuits with some structural similarities. Two ideas fundamentally distinguish the technique from previous approaches. First, those candidate equivalent pairs to be checked are built by a level-based approach; and second, false negative pair will be handled by an effective strategy. Our experiments on the ISCAS benchmark circuits demonstrate that the outlined approach is very promising.
出处
《微电子学》
CAS
CSCD
北大核心
2004年第6期618-623,共6页
Microelectronics
基金
国家自然科学基金资助项目(90207002)
国家863计划资助项目(2002AAIZ1460)
关键词
组合电路
形式验证
等价验证
电路划分
Combinational circuit
Formal verification
Equivalence checking
Circuit partition