摘要
FPGA是现场可编程门阵列(FieldProgrammableGateArray)的简称。本文以简单实用的16位CPU的设计为例,介绍了Altera公司的ACEX1K嵌入式现场可编程门阵列器件的自顶向下设计方法,给出了ACEX1K嵌入式可编程器件在Max+plusⅡ环境下对16位CPU的仿真实现。
The Field Programmable Gate Array is FPGA for short. Taking the design of the simple and practical 16 bits CPU for example, this paper introduces the designing methods of the top-down compiler of Altera Company's field programmable gate array, and presents ACEX 1K embedded programmable device's emulation realization of 16 bits CPU under the condition of Max+plus Ⅱ.
出处
《重庆职业技术学院学报》
2005年第1期117-119,共3页
Journal of Chongqing Vocational& Technical Institute