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叠层片式电感的短路失效模型

Short Circuit Failing Model in Multi-layer Chip Inductor
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摘要 通过对叠层片式电感器短路失效样品的电性能测试和显微分析可知,叠层片式电感器的短路主要为引出端短路和介质层短路,其根源在于铁氧体的粒度、浆料分散性、丝网制作及烧结工艺,通过完善球磨工艺、改变加料方式、减少丝网乳胶厚度、控制成型和烧结工艺,可使短路率由15%以上降低为6%以下。 The short circuit failure of multi-layer chip inductor is caused by short circuit of derivation termination electrode and dielectric substance layer through testing electric characteristics and observing microstructure of failure samples .The mainly influencing factors are particle size of ferrite powder, slurry decentralization, silk - screen producing and sintering techniques .The short circuit rate can be decreased greatly from over 15% to 6% by improving ball-milling techniques, changing accretion additives ways, reducing the film thickness of silk screen ,controlling build-up and sintering techniques.
出处 《电子元件与材料》 CAS CSCD 北大核心 2005年第1期16-18,共3页 Electronic Components And Materials
关键词 材料失效与保护 叠层片式电感 短路 失效 material failure and protection multi-layer chip inductor short circuit failure
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参考文献3

  • 1李懋强.关于陶瓷成型工艺的讨论[J].硅酸盐学报,2001,29(5):466-470. 被引量:32
  • 2Nakamura T, Okano Y. Ferrite powders for chip inductor device [J]. J Mater Sci, 1998, 33(4): 1091-1094.
  • 3Nakamura T, O'Kano Y. Ferrite powders for chip inductor device [J|. J Mater Sci, 1998, 33(4): 1091-1094.

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