基于FPGA的非对称同步FIFO设计

Design of Asymmetric Synchronous FIFO Based on FPGA

本文在分析了非对称同步FIFO的结构特点及其设计难点的基础上,采用VHDL描述语言,并结合FPGA,实现了一种非对称同步FIFO的设计。

On the base of analyzing the structure and the design difficulty of the asymmetric synchronous FIFO, an asymmetric synchronous FIFO is achieved by using VHDL language and FPGA in this paper.