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一个精确时钟驱动的Dickson倍压电荷泵电路 被引量：7

A Precise-Clock Driven Dickson Voltage-Doubler Charge Pump
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摘要 提出了一种基于 Dickson电荷泵电路 ,由自带参考电压的时钟电路驱动 ,并与耦合倍压电路相结合的片上升压电路。该电路由于保证了输出编程电压的精确度 ,从而控制了存储单元阈值电压的偏移 ,降低了对外围电路的要求 。 A voltage doubler charge pump is presented, which is based on the Dickson charge pump and driven by a clock circuit with self reference voltage Because it guarantees the precision of the programming voltage pulse, the charge pump could minimize offset of the threshold voltage of the memory cell, reduce the complexity of the peripheral circuit and enhance the reliability of the whole system
作者 刘楷 潘立阳 朱钧
机构地区 清华大学微电子学研究所
出处 《微电子学》 CAS CSCD 北大核心 2002年第4期302-304,307,共4页 Microelectronics
关键词 电荷泵 FLASH存储器 Dickson电路 倍压电路 Charge pump Flash memory Dickson circuit Voltage doubler
分类号 TN431.2 [电子电信—微电子学与固体电子学]
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参考文献4

  • 1Dickson J F. On-chip high-voltage generation in NMOS integrated circuits using an improved voltage multiplier technique [J]. IEEE J Sol Sta Circ, 1976; 11 (6): 374-378.
  • 2Kawahara T. Bit-line clamped sensing multiplex and accurate high voltage generator for quarter-micron flash memories [J]. IEEE J Sol Sta Circ, 1996; 31 (11):1590-1600.
  • 3Tanzawa T, Tanaka T. A stable programming pulse generator for single power supply flash memories [J]. IEEE J Sol Sta Circ, 1997; 32 (6):845-851.
  • 4Favrat P. A high-efficiency CMOS voltage doubler [J]. IEEE J Sol Sta Circ, 1998; 33(3):410-416.

同被引文献27

  • 1应建华,刘毅,张玺,郭艳.一种高性能低压电荷泵电路[J].华中科技大学学报（自然科学版）,2006,34(7):88-89. 被引量：3
  • 2Wu J T, Chang Y H, Chang K L. 1. 2 V CMOS switched capacitor circuits [C] ff International Solid- State Circuits Conference. Dallas.- IEEE, 1996: 388- 389.
  • 3Pierre R S. Low-power BiCMOS op-amp with inte- grated current-mode charge pump[J]. IEEE Journal of Solid-State Circuits, 2000, 35(7): 1046-1050.
  • 4Choi K H, Park J M, Kim J K, et al. Floating-well charge pump circuits for sub-2.0 V single power sup- ply flash memories[R]. Symposium on VLSI Circuits Digest of Technical Papers. Kyoto: IEEE, 1997: 61- 62.
  • 5Shin J, Chung I Y, Park Y J, et al. A hew charge pump without degradation in threshold voltage due to body effect[J]. IEEE Journal of Solid-State Circuits, 2000, 35(8): 1227-1230.
  • 6Sawada K, Sugawara Y, Masui S. An on-chip volt- age generator circuit for EEPROM's with a power-supply voltage below 2 V[R]. Symposium on VLSI Circuits Digest of Technical Papers. Kyoto: IEEE, 1995: 75-76.
  • 7Wu J T, Chang K L. MOS charge pump for low- voltage operation [J]. IEEE Journal of Solid-State Circuits, 1998, 33(4): 592-597.
  • 8Ker M D, Chen S L, Tsai C S. Design of charge pump circuit with consideration of gate-oxide reliabil-ity in low-vol-tage CMOS processes[J]. IEEE Jour- nal of Solid-State Circuits, 2006, 41(5) : 1100-1107.
  • 9Jiang Bowei, Wang Xiao, Min Hao. A novel all- pMOS AC to DC charge pump with high efficiency [J]. Chinese Journal of Semiconductors, 2008, 29 (4) : 660-662.
  • 10DICKSON J F. On-chip high-voltage generation in MNOS integrated circuits using an improved voltage multiplier technique [J]. IEEE J Sol Sta Circ, 1976, 11(3) : 374-378.

引证文献7

二级引证文献13

微电子学
2002年 第4期

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