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一种新体系结构、带Java功能的32位嵌入式微处理器设计 被引量：1

Novel 32bit Embedded Reduced-Instruction-Set-Computer with Java Extension
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摘要 针对嵌入式系统设计了一个带 Java功能的 32位嵌入式微处理器 ,具有两种工作模式 ,支持本地 RISC指令集和 Java字节码两套指令系统 ,并能够在两种状态之间进行无缝的切换 .与现有的同类微处理器比较 ,性能有较大提高 . Designed a 32bit RISC with Java extensio n, which bears two seamlessly switchable processing modes and supports dual inst ruction sets: native RISC instruction and Java byte code. Compared with similar microprocessors in the state of art, our design obtains a significant performanc e enhancement.
作者 徐科 忻凌 朱柯嘉 闵昊
机构地区 复旦大学专用集成电路与系统国家重点实验室
出处 《小型微型计算机系统》 CSCD 北大核心 2005年第1期90-95,共6页 Journal of Chinese Computer Systems
基金 国家"八六三"项目 (2 0 0 2 AA1Z10 60 )资助 上海市科委 SDC项目 (0 3 70 62 0 2 0 )资助
关键词 嵌入式 精简指令计算机 流水线 通用寄存器组 JAVA CACHE 堆栈 折叠 前推 Embedded RISC pipeline register file Java cache stack folding fo rwarding
分类号 TP331 [自动化与计算机技术—计算机系统结构]
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参考文献8

  • 1Michael O'Connor J. PICOJAVA-I : the Java virtual machine in hardware[J]. Micro IEEE, March-April 1997,17(2) :45-53.
  • 2Lee-Ren Ton, Lung-Chung Chang, etc. Instruction folding in Java processor [A]. Parallel and Distributed Systems [C],1997. Proceedings., 1997 International Conference on, 10-13 Dec. 1997:138-143,.
  • 3David Cormie. Jazelle-ARM architecture extension for Java applications[Z]. White Paper, 2-6.
  • 4Tim Lindholm, Frank Yellin. Java virtual machine specification[M]. Addison-Wesley Publishing Company, 1996, 99-257.
  • 5David A. Patterson, John L. Hennessy. Computer architecture: a quantitative approach, Second edition[M]. China Machine Press, 1999, 139-161.
  • 6Steve Furber. ARM system-on-chip architecture[M]. AddisonWesley Publishing Company, 2000, 105-136.
  • 7Lee-Ren Ton, Lung-Chung Chang, etc. Instruction folding in Java processor [A]. Parallel and Distributed Systems [C].1997. Proceedings., 1997 International Conference on, 10-13 Dec. 1997:138-143,.
  • 8Steve Furber. ARM system-on-chip architecture[M]. Addison-Wesley Publishing Company, 2000, 105-136.

同被引文献5

  • 1Kenneth B Kent,Micaela Serra.Hardware/software co-design of a java virtual machine[C].In:the 11th IEEE International.Workshop on Rapid Systems Prototyping,Paris:IEEE Inc,2000,66-71.
  • 2Ling Xin,Ke Xu,Hao Min.The architecture of the java extension of 32-bit RISC for smart cards and other embedded systems[C].In:the 5th International Conference on ASIC,Beijing:IEEE Inc,2003,397-400.
  • 3Harlan McGhan,Mike O′Connor.PicoJava:a direct execution engine for java bytecode[C].IEEE Computer,1998,31(10):22-30.
  • 4Hejun Ma,Ken Kent,David Luke.An implementation of the hardware partition in a software/hardware co-designed java virtual machine[C].In:Electrical and Computer Engineering 2004 Canadian Conference,Canada:IEEE Inc,2004,2057-2060.
  • 5M Watheq El-Kharashi,Fayez Gebali,Kin F Li,et al.The JAFARDD processor:a Java architecture based on a folding algorithm,with Reservation stations,Dynamic translation,and Dual processing[J].Consumer Electronics,IEEE Transactions,2002,48(4):1004-1015.

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小型微型计算机系统
2005年 第1期

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