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高速多路实时数据采集处理系统设计 被引量:13

Design of High-speed Multi-channel Real-time Data Acquisition and Processing System
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摘要  介绍了以CPLD为核心处理芯片的多路数据采集系统的实现方法。该系统通过高速状态机直接将采样数据储存到高速缓冲SRAM阵列中,然后再转存至低速存储器(SDRAM)中,再由CPLD构成的滤波器进行数据处理,整个系统由CPLD和单片微控制器进行联合控制。采用3块TI公司的8位80MSPS的高速单流水线A/D芯片TLV5580采集数据,通过延迟流水采样技术可实现对24路通道,最高采样率为240MHz的模拟信号的采集和处理;采用ALTERA公司的CPLD芯片EPF10K10AFC256-1实现数据处理。通过仿真和调试运行,验证了复杂的数据处理过程被大大简化了,整个系统高速、紧凑,具有良好的抗干扰性。 This article introduces the method of the multi-channel data acquisition system with CPLD as its kernel processor chip. In the beginning, acquired sampling data is saved up in SRAM cushion array through high speed station machine, then put into low speed SDRAM, and then processed by filter, which is composed of the CPLD. So the whole system is controlled by CPLD and MCU. By using three chips TLV5580, which is a 8-bit 80 MSPS ( MSamples/sec) high-speed single pipeline A/D chip produced by Texas Instruments Co., and using delay-pipeline-sampling technique, the whole system can realize maximal sampling 240MHz, acquire and handle 24 channels analog signals at the same time. Data processing uses EPF10K10AFC256-1 chip produced by ALTERA Co. The simulated results and the performance of actually running verify that the complex data processing has been turn into easy significantly, and the whole system with high-speed, smaller bulk, effective anti-interference.
出处 《计算机工程》 CAS CSCD 北大核心 2004年第24期180-182,共3页 Computer Engineering
基金 江苏省高校高新技术项目(030420601)
关键词 CPLD 滤波器 SRAM缓冲阵列 高速数据采集 CPLD Filter SRAM cushion array High-speed data acquisition
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  • 1EPI SGX40D Data Sheet.Altera,2000

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