三维互连全耦合电容矩阵的层次式提取算法

Hierarchical Extraction of Global Capacitance Matrix for 3D VLSI Interconnects

基于直接边界元素法 ,提出一种边界电容矩阵概念 ,从而实现了三维互连电容的层次式提取算法 .该算法将三维求解区域划分为若干小块 ,对每个小块分别计算其边界电容矩阵 ,再通过层次式合并算法便可得到全耦合互连电容矩阵 .数值实验表明 ,本方法进行电容提取的速度比商业软件SpiceLink、虚拟多介质快速算法。

Based on the direct boundary element method,a concept of “boundary capacitance matrix(BCM)” is proposed for the hierarchical extraction of 3D VLSI interconnect capacitance.In the hierarchical algorithm,the 3D simulated region is first divided into some small blocks.Then,after the BCM for each small block is computed and combined along a hierarchical tree of 3D domains,the global capacitance matrix is finally obtained.Numerical experiments show that with this hierarchical extraction algorithm the capacitance matrix can be computed with faster speed than SpiceLink,QMM-based algorithm,and domain decomposition method to more than one magnitude.