摘要
分析了数字锁相环路的基本原理及实现过程,论述了一种利用FPGA器件中的锁相环部分来实现高精度数字锁相的方法,具有可编程性、线路简单、捕捉速度快以及跟踪精度高等特点,并通过仿真对结果进行了验证。
The fundamental principle and the realization process of digital phase-locked loop are analyzed. This paper expounds a method of high precision digital locked phase with the phase-locked loop of FPGA. The proposed method has properties of programmable function, the simple circuit, quick-operating capture, high precision of frequency tracking, etc. It is confirmed through simulation.
出处
《继电器》
CSCD
北大核心
2005年第3期72-75,共4页
Relay
关键词
数字锁相
锁相环
FPGA
digital phase locking
phase-locked loop
FPGA