摘要
阐述了一种高性能低功耗MCU的设计。该MCU和标准8051具有相同的指令系统和功能,通过体系结 构上采用哈佛结构、1时钟机器周期和指令预取,提高MCU的工作效率;利用门控时钟,降低MCU的功耗。在 CPU内部模块上,设计了独立于ALU的乘除法模块、并行执行结构ALU、多时钟体系状态机,以提高MCU的速 度,从而达到优于标准8051的性能。采用所设计的MCU IP核,成功地在Altera的APEX20K上通过FPGA仿真, 该器件可方便地运用于片上系统(SOC)。
A high-performance and low-power 8-bit microcontroller is described, which shares the same instruction set with the standard Intel 8051. In system architecture, one-clock period per machine cycle architecture and pre-fetching instruction method are adopted to improve MCU's power efficiency. In CPU architecture, parallel-executing architecture ALU, independent multiplier and divider module, multi-clock architecture and hardwired control unit are used to achieve high speed, and gating clock method is used to reduce power dissipation. The MCU IP core is successfully simulated in Altera's APEX20KE FPGA. As an IP core, the MCU can be conveniently integrated into SOC.
出处
《微电子学》
CAS
CSCD
北大核心
2005年第1期32-35,共4页
Microelectronics
基金
Project supported by the Science Foundation of Shanghai Municipal Commission of Science Technology (Grant No.02DJ14034)Key Technology Foundation of Shanghai Municipal Commission of Science Technology(Grant No.025911323)