摘要
在按行扫方式数据输入的约束条件下,提出了基于提升算法的5-3和9-7小波变换的有效 VLSI实现结构。采用行扫的数据输入方式,完成2D小波变换只需少量的几行缓冲寄存器单元,可 有效减少片内的存储器资源需求以及对存储器的访问次数。采用时分复用技术优化结构设计,大大 减少了所用乘法器、加法器运算单元,实现了输入数据的嵌入式流水线处理,有效减少了所需寄存 器单元数量,由此有效减少了系统设计占用面积和系统功率消耗,并使系统硬件的利用率达到 100%。该系统实现了原信号的细节分量和近似分量的交替输出;该结构具有实现简单、规则和扩展 性好的特点,非常适合VLSI实现。
Efficient VLSI architectures based on the lifting scheme for 5-3 and 9-7 wavelet transforms are proposed, whose input/output can be read in/out by line-scan fashion. The implementation of 2-D DWT based on line-scan requires only a few lines in the buffer, which significantly reduces the size of the embedded storage and the amount of memory accesses. Time division multiplexing (TDM) technology is adopted to optimize the design of the architectures, which efficiently cuts down the number of multipliers and adders, and realizes embedded pipeline processing of input data, reducing the number of registers required, hence a smaller chip and lower power. The detail component and the approximation of the input signal are available alternately. Being simple, regular and scalable, the proposed architectures are quite suitable for VLSI implementation.
出处
《微电子学》
CAS
CSCD
北大核心
2005年第1期47-50,共4页
Microelectronics
基金
国家"十五"863重点项目基金资助(2002AA133010)
关键词
图像压缩
提升小波变换
线扫格式
时分复用
Image compression
Lifting wavelet transform
Line-scan fashion
Time division multiplexing