期刊文献+

多处理器嵌入式系统的软/硬件协同模拟验证方法 被引量:1

Hardware/Software Co-simulation Method for Multi-processor Embedded Systems
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摘要 介绍一种软硬件协同模拟验证方法,该方法以指令集模拟器和事件驱动硬件模拟器为基本框架,透明地将多个不同类型的指令集模拟器和硬件模拟器连接起来,实现面向混合多处理器嵌入式系统的软硬件协同模拟验证。介绍了多处理器间通信机制的模拟实现及优化方法,重点讨论了以硬件模拟器为控制核心的协同模拟同步方法。 Multi-processor solutions in the embedded world are being designed to meet the ever increasing computational and timing demand, whereas, there are very few solution for multi-processor embedded systems developers needs. A hardware/software simulation method for multi-processor embedded systems is introduced, it combines an event-driven hardware simulator with multiple instructions set simulator (1SS), and each ISS simulates the software of one processor. The simulation and optimization of communication among multiple processors are presented, and in the end, the synchronization of simulators, which is based on control kernel of the hardware simulator, is discussed in detail.
出处 《计算机工程》 EI CAS CSCD 北大核心 2005年第2期216-218,共3页 Computer Engineering
基金 国防基础科研基金资助项目
关键词 多处理器 协同模拟 软硬件 嵌入式系统 指令集模拟器 事件驱动 验证方法 同步方法 通信机制 连接 Embedded system Multi-processor Co-simulation Instruction set simulator
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  • 1Gerin P,Yoo S,Nicolesu G.Scalable and Flexible Cosimulation of SoC Designs with Heterogeneous Multi-processor Target Archi- tectures[C]//Proc.of the Asia and South Pacific Design Automation Conference.Yokohama,Japan: [s.n.],2001.
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