基于Verilog HDL实现RISC微处理器

Developing RISC microprocessor with Verilog HDL

介绍基于精简指令计算机技术的8位微处理器的设计与实现,主要包括指令集取指、 分析、执行、回写单元的设计;以及取指、执行、回写三级流水线技术的实现。微处理器包 含8个基本部件:时钟发生器、指令寄存器、累加器、算术逻辑运算单元、数据控制器、状 态控制器、程序计数器、地址译码器。设计使用可综合的Verilog HDL语言描述,采用Xilinx 公司最新的集成开发工具软件ISE 6.2及该公司的XC9572 Flash工艺CPLD器件和Modelsim 验证实现。

The method to develop an eight bits reduced instruction set computer (RISC) microprocessor is described, which mainly include Instruction Fetch(IF), Instruction Execute(EX), Write Back(WB), base on the thinking of RISC technology. The microprocessor is made up of eight units: clkgen unit, register unit, accum unit, alu unit, control unit, datactl unit, counter unit, address decode unit. It is implemented with Verilog HDL on the Xilinx Corporation EDA tool ISE6.2 and its CPLD product XC9572.