摘要
针对定点FFT处理器精度不高的缺点,提出了浮点格式FFT处理器的FPGA硬件实现方案。详细阐述了FFT处理器的自定制浮点格式确定、算法选择和浮点加法实现等关键技术。该处理器已投入使用,工作性能稳定,系统时钟80MHz,完成1024点FFT IFFT运算只需64μs,误差小于-80dB。
The FPGA realization of a floating-point FFT processor is proposed to get over the poor precision of the fixed-point FFT processor.The definition of the floating-point format,the selection of arithmetic and the key techniques of the FPGA realization are discussed. Such a processor has been put into service and has stable performance. Its operating frequency is 80MHz and it can finish 1024 point FFT/IFFT in 64μs with an error less than -80dB.
出处
《国防科技大学学报》
EI
CAS
CSCD
北大核心
2004年第6期61-64,共4页
Journal of National University of Defense Technology