高基FFT处理器高效地址产生算法

An Efficiency Address Generation Algorithm For High_radix FFT Processor

FFT算法是数字信号处理最常用算法,使用FFT处理器是进行FFT运算的重要手段之一.本文针对主基16局部流水的FFT处理器,提出了一种运用于高基FFT处理器的新型地址产生结构,能够进行16～4096点可变长的FFT运算,具有快速灵活的特点,且结构简单,适合FFT处理器中对数据通路控制的实现.

FFT algorithm is the most used algorithm for digital signal processing, and a FFT processor is one of the important means for FFT computation. Aim at the main_base 16 local piple_line butterfly unit, this paper proposes a novel address mapping method applied in a high_radix FFT processor, a variable length FFT computation from 16 to 4096 point can be done by this method. The method has such features as agility, high computation speed and simple architecture and it well meets the control of the data channel of FFT processor.