一种CMOS四象限模拟乘法器的设计

The Design of a CMOS Four-Quadrant Analog Multiplier

本文提出了一种CMOS四象限模拟乘法器。这种乘法器基于MOS晶体管的电流-电压平方关系,采用线性MOS跨导器、悬浮电压发生器和线性MOS电阻完成乘法运算。这种乘法器具有单端输出电压和较好的温度特性。文章比较详细地介绍了电路特点和工作原理,分析了电路的温度性能,并给出了SPICEⅡ的模拟结果。

A CMOS four-quadrant analog multiplier is proposed in the paper, which. based on the current-voltage square law for MOS transistors, performs multiplication by using linearized transconductance stage. suspended voltage generator and linearized MOS resistors. The multiplier has single-ended output voltage and shows good temperature characteristics. The features of the circuit and its theory of operation are described in detail. The temperature behaviour is analyzed and results from SPICE I simulation are also given.