0.25μm CMOS光纤通信用2.5Gb/s 1∶16分接器

A 2.5 Gb/s 1∶16 Demultiplexer for Optical Communication in 0.25 μm CMOS Technology

文中比较了串行、并行、树型结构分接器的特点 ,介绍了分接器的关键电路的结构和设计考虑 ,并给出了仿真结果。采用伪静态逻辑和树型结构设计的分接器在 2 .5 V电源电压下 ,工作速率达到 2 .5 Gb/s,平均功耗 2 81 m W,面积1 .5 6mm× 1 .86mm。

A comparison is drawn between the three main structures of the demux(demultiplexer): serial-type, parallel-type and tree-type. It also introduces the key circuits and the design consideration of 2.5 Gb/s 1∶16 demux. The simulation results demonstrate that the demux realized with the pseudo-static logic and parallel-type structure can work correctly at 2.5 Gb/s and only consumes about 281 mW totally at 2.5 V power supply. The chip area is 1.56 mm×1.86 mm.