高速PLL电路中的电荷泵电路设计

Design of Charge Pump for High-Speed Phase-Locked Loop

提出了一种适用于USB2.0高速模式480MHz时钟产生的单片锁相环(PLL)电路中的新型电荷泵电路设计。电路设计是基于TSMC公司的0.25umCMOS混合信号模型,采用了正反馈及与电源无关的带隙基准设计方法,着重解决传统电荷泵电路设计中存在的电荷注入现象(ChargeInjection)。仿真结果表明本文的设计方案提高了电路的开关速度,符合480MHz速度的PLL对电荷泵电路的要求。

A novel structure of a charge pump for high-speed Phase-Locked Loop (PLL) is presented. The design is based on 0.25um CMOS mixed-signal process of TSMC. Positive feedback and supply-independent biasing are used to solve charge injection effect and to obtain faster switching speed. Simulation results show that the charge pump meets the need of 480 MHz PLL circuit entirely.