摘要
JPEG2000的位平面编码运算开销很大,是编码器提高速度的瓶颈。为了使JPEG2000能用于实时图像处理,本文设计了存储优化的硬件实现方案,设计以verilog语言描述,通过了功能仿真和逻辑综合,最终实现的IP核能在0.1s完成512×512的灰度图像的编码。
The overhead of bit plane coder in JPEG2000 is very large, so it becomes the main bottleneck for improving the speed of encoder. In this paper, a memory optimizing implementation scheme is proposed and modeled using the verilog language for the purpose of applying JPEG2000 in real-time image processing. After successful simulation and sythesis, the IP core is able to encode a 512×512 gray-scale image in 0.1 second.
出处
《微计算机信息》
北大核心
2005年第2期174-175,共2页
Control & Automation
基金
上海市科委重点基础学科研究(02DJ14033)
