数字计时器的逻辑设计

Logic Design of Digital Timer

作者曾提出过电子数学计时器的一种逻辑设计方案。本文是对前述设计方案的改进与完善,使其在方法上更有系统,在电路上更为简单。

This paper presents the improvement and completion of the previously proposed logic design scheme of electronic digital timer so as to make it more systematic in methodology and simpler in circuitry.