摘要
本文着重研究了０．６μｍ自对准Ｔｉ－ＳＡＬＩＣＩＤＥＬＤＤＭＯＳ工艺技术．ＴｉＳｉ２的形成采用两步快速热退火及选择腐蚀完成，Ｔｉ膜厚度的最佳选择使ＳＡＬＩＣＩＤＥ工艺与０．２μｍ浅结相容，源／漏薄层电阻为４Ω／□．上述技术已成功地应用于０．６μｍ自对准Ｔｉ－ＳＡＬＩＣＩＤＥＬＤＤＮＭＯＳ器件及其Ｅ／ＤＭＯＳ３１级环形振荡器的研制，特性良好．
Abstract In this paper the technologies for 0.6μm self-aligned Ti-Silicide LDD MOS device are investigated. Two-step rapid thermal annealing and selective etchare adopted for TiSi2 formation. The optimum of Ti thickness makes SALICIDE technology compatible with 0.2μm shallow junction depth, the sheet resistance obtained for n+ source/drain is 4.0Ω/□. The technologies mentioned above have been successfully applied to the fabrication of 0.6μm self-aligned Ti-Silicide LDD NMOSFET and E/D MOS 31 stage ring oscillators with good characteristics.
